 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| Low Cost, High Speed Differential Driver AD8131 FEATURES High speed 400 MHz, -3 dB full power bandwidth 2000 V/s slew rate Fixed gain of 2 with no external components Internal common-mode feedback to improve gain and phase balance: -60 dB @ 10 MHz Separate input to set the common-mode output voltage Low distortion: 68 dB SFDR @ 5 MHz 200 load Power supply range +2.7 V to 5 V FUNCTIONAL BLOCK DIAGRAM -DIN 1 VOCM 2 V+ 3 +OUT 4 1.5k 1.5k 750 750 8 +DIN 7 NC 6 V- 5 -OUT 01072-001 AD8131 NC = NO CONNECT Figure 1. APPLICATIONS Video line driver Digital line driver Low power differential ADC driver Differential in/out level shifting Single-ended input to differential output driver GENERAL DESCRIPTION The AD8131 is a differential or single-ended input to differential output driver requiring no external components for a fixed gain of 2. The AD8131 is a major advancement over op amps for driving signals over long lines or for driving differential input ADCs. The AD8131 has a unique internal feedback feature that provides output gain and phase matching that are balanced to -60 dB at 10 MHz, reducing radiated EMI and suppressing harmonics. Manufactured on the Analog Devices, Inc. next generation XFCB bipolar process, the AD8131 has a -3 dB bandwidth of 400 MHz and delivers a differential signal with very low harmonic distortion. The AD8131 is a differential driver for the transmission of high-speed signals over low-cost twisted pair or coax cables. The AD8131 can be used for either analog or digital video signals or for other high-speed data transmission. The AD8131 driver is capable of driving either Cat3 or Cat5 twisted pair or coax with minimal line attenuation. The AD8131 has considerable cost and performance improvements over discrete line driver solutions. The AD8131 can replace transformers in a variety of applications, preserving low frequency and dc information. The AD8131 does not have the susceptibility to magnetic interference and hysteresis of transformers. It is smaller, easier to work with, and has the high reliability associated with ICs. -20 VOUT, dm = 2V p-p VOUT, cm/VOUT, dm -30 BALANCE ERROR (dB) -40 -50 VS = +5V -60 -70 -80 1 10 100 FREQUENCY (MHz) 1000 Figure 2. Output Balance Error vs. Frequency The AD8131's differential output also helps balance the input for differential ADCs, optimizing the distortion performance of the ADCs. The common-mode level of the differential output is adjustable by a voltage on the VOCM pin, easily level-shifting the input signals for driving single-supply ADCs with dual supply signals. Fast overload recovery preserves sampling accuracy. The AD8131 is available in both SOIC and MSOP packages for operation over -40C to +125C. Rev. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c)2005 Analog Devices, Inc. All rights reserved. 01072-002 VS = 5V AD8131 TABLE OF CONTENTS Specifications..................................................................................... 3 DIN to OUT Specifications...................................................... 3 VOCM to OUT Specifications ..................................................... 4 DIN to OUT Specifications...................................................... 5 VOCM to OUT Specifications ..................................................... 6 Absolute Maximum Ratings............................................................ 7 ESD Caution.................................................................................. 7 Pin Configuration and Function Descriptions............................. 8 Typical Performance Characteristics ............................................. 9 Operational Description................................................................ 15 Theory of Operation ...................................................................... 16 Analyzing an Application Circuit............................................. 16 Closed-Loop Gain ...................................................................... 16 Estimating the Output Noise Voltage ...................................... 16 Calculating the Input Impedance of an Application Circuit..................................................................... 16 Input Common-Mode Voltage Range in Single-Supply Applications ....................................................... 17 Setting the Output Common-Mode Voltage .......................... 17 Driving a Capacitive Load......................................................... 17 Applications..................................................................................... 18 Twisted-Pair Line Driver........................................................... 18 3 V Supply Differential A-to-D Driver.................................... 18 Unity-Gain, Single-Ended-to-Differential Driver ................. 19 Outline Dimensions ....................................................................... 20 Ordering Guide .......................................................................... 20 REVISION HISTORY 6/05--Rev. A to Rev. B Updated Format..................................................................Universal Changed Upper Operating Limit .....................................Universal Changes to Ordering Guide .......................................................... 20 Rev. B | Page 2 of 20 AD8131 SPECIFICATIONS DIN TO OUT SPECIFICATIONS 25C, VS = 5 V, VOCM = 0 V, G = 2, RL, dm = 200 , unless otherwise noted. Refer to Figure 5 and Figure 39 for test setup and label descriptions. All specifications refer to single-ended input and differential outputs, unless otherwise noted. Table 1. Parameter DYNAMIC PERFORMANCE -3 dB Large Signal Bandwidth -3 dB Small Signal Bandwidth Bandwidth for 0.1 dB Flatness Slew Rate Settling Time Overdrive Recovery Time NOISE/HARMONIC PERFORMANCE Second Harmonic Conditions VOUT = 2 V p-p VOUT = 0.2 V p-p VOUT = 0.2 V p-p VOUT = 2 V p-p, 10% to 90% 0.1%, VOUT = 2 V p-p VIN = 5 V to 0 V Step VOUT = 2 V p-p, 5 MHz, RL, dm = 200 VOUT = 2 V p-p, 20 MHz, RL, dm = 200 VOUT = 2 V p-p, 5 MHz, RL, dm = 800 VOUT = 2 V p-p, 20 MHz, RL, dm = 800 VOUT = 2 V p-p, 5 MHz, RL, dm = 200 VOUT = 2 V p-p, 20 MHz, RL, dm = 200 VOUT = 2 V p-p, 5 MHz, RL, dm = 800 VOUT = 2 V p-p, 20 MHz, RL, dm = 800 20 MHz, RL, dm = 800 20 MHz, RL, dm = 800 f = 20 MHz NTSC, RL, dm = 150 NTSC, RL, dm = 150 Single-ended input Differential input Min Typ 400 320 85 2000 14 5 -68 -63 -95 -79 -94 -70 -101 -77 -54 30 25 0.01 0.06 1.125 1.5 1 -7.0 to +5.0 -70 2 8 4 10 -3.6 to +3.6 60 2 -70 7 Max Unit MHz MHz MHz V/s ns ns dBc dBc dBc dBc dBc dBc dBc dBc dBc dBm nV/Hz % degrees k k pF V dB mV V/C mV V/C V mA V/V dB Third Harmonic IMD IP3 Voltage Noise (RTO) Differential Gain Error Differential Phase Error INPUT CHARACTERISTICS Input Resistance Input Capacitance Input Common-Mode Voltage CMRR OUTPUT CHARACTERISTICS Offset Voltage (RTO) VOUT, dm/VIN, cm; VIN, cm = 0.5 V VOS, dm = VOUT, dm; VDIN+ = VDIN- = VOCM = 0 V TMIN to TMAX variation VOCM = float TMIN to TMAX variation Maximum VOUT; single-ended output VOUT, dm/VIN, dm; VIN, dm = 0.5 V VOUT, cm/VOUT, dm; VOUT, dm = 1 V 1.97 Output Voltage Swing Linear Output Current Gain Output Balance Error 2.03 Rev. B | Page 3 of 20 AD8131 VOCM TO OUT SPECIFICATIONS 25C, VS = 5 V, VOCM = 0 V, G = 2, RL, dm = 200 , unless otherwise noted. Refer to Figure 5 and Figure 39 for test setup and label descriptions. All specifications refer to single-ended input and differential outputs, unless otherwise noted. Table 2. Parameter DYNAMIC PERFORMANCE -3 dB Bandwidth Slew Rate DC PERFORMANCE Input Voltage Range Input Resistance Input Offset Voltage Input Bias Current VOCM CMRR Gain POWER SUPPLY Operating Range Quiescent Current Power Supply Rejection Ratio OPERATING TEMPERATURE RANGE Conditions VOCM = 600 mV VOCM = -1 V to +1 V Min Typ 210 500 3.6 120 1.5 2.5 0.5 -60 1 Max Unit MHz V/s V k mV mV A dB V/V V mA A/C dB C VOS, cm = VOUT, cm; VDIN+ = VDIN- = VOCM = 0 V VOCM = float VOUT, dm/VOCM; VOCM = 0.5 V VOUT, cm/VOCM; VOCM = 1 V 7 0.988 1.4 10.5 1.012 5.5 12.5 -56 +125 VDIN+ = VDIN- = VOCM = 0 V TMIN to TMAX variation VOUT, dm/VS; VS = 1 V 11.5 25 -70 -40 Rev. B | Page 4 of 20 AD8131 DIN TO OUT SPECIFICATIONS 25C, VS = 5 V, VOCM = 2.5 V, G = 2, RL, dm = 200 , unless otherwise noted. Refer to Figure 5 and Figure 39 for test setup and label descriptions. All specifications refer to single-ended input and differential outputs, unless otherwise noted. Table 3. Parameter DYNAMIC PERFORMANCE -3 dB Large Signal Bandwidth -3 dB Small Signal Bandwidth Bandwidth for 0.1 dB Flatness Slew Rate Settling Time Overdrive Recovery Time NOISE/HARMONIC PERFORMANCE Second Harmonic Conditions VOUT = 2 V p-p VOUT = 0.2 V p-p VOUT = 0.2 V p-p VOUT = 2 V p-p, 10% to 90% 0.1%, VOUT = 2 V p-p VIN = 5 V to 0 V Step VOUT = 2 V p-p, 5 MHz, RL, dm = 200 VOUT = 2 V p-p, 20 MHz, RL, dm = 200 VOUT = 2 V p-p, 5 MHz, RL, dm = 800 VOUT = 2 V p-p, 20 MHz, RL, dm = 800 VOUT = 2 V p-p, 5 MHz, RL, dm = 200 VOUT = 2 V p-p, 20 MHz, RL, dm = 200 VOUT = 2 V p-p, 5 MHz, RL, dm = 800 VOUT = 2 V p-p, 20 MHz, RL, dm = 800 20 MHz, RL, dm = 800 20 MHz, RL, dm = 800 f = 20 MHz NTSC, RL, dm = 150 NTSC, RL, dm = 150 Single-ended input Differential input Min Typ 385 285 65 1600 18 5 -67 -56 -94 -77 -74 -67 -95 -74 -51 29 25 0.02 0.08 1.125 1.5 1 -1.0 to +4.0 -70 3 8 4 10 1.0 to 3.7 45 2 -62 7 Max Unit MHz MHz MHz V/s ns ns dBc dBc dBc dBc dBc dBc dBc dBc dBc dBm nV/Hz % degrees k k pF V dB mV V/C mV V/C V mA V/V dB Third Harmonic IMD IP3 Voltage Noise (RTO) Differential Gain Error Differential Phase Error INPUT CHARACTERISTICS Input Resistance Input Capacitance Input Common-Mode Voltage CMRR OUTPUT CHARACTERISTICS Offset Voltage (RTO) VOUT, dm/VIN, cm; VIN, cm = 0.5 V VOS, dm = VOUT, dm; VDIN+ = VDIN- = VOCM = 2.5 V TMIN to TMAX variation VOCM = float TMIN to TMAX variation Maximum VOUT; single-ended output VOUT, dm/VIN, dm; VIN, dm = 0.5 V VOUT, cm/VOUT, dm; VOUT, dm = 1 V 1.96 Output Voltage Swing Linear Output Current Gain Output Balance Error 2.04 Rev. B | Page 5 of 20 AD8131 VOCM TO OUT SPECIFICATIONS 25C, VS = 5 V, VOCM = 2.5 V, G = 2, RL, dm = 200 , unless otherwise noted. Refer to Figure 5 and Figure 39 for test setup and label descriptions. All specifications refer to single-ended input and differential outputs, unless otherwise noted. Table 4. Parameter DYNAMIC PERFORMANCE -3 dB Bandwidth Slew Rate DC PERFORMANCE Input Voltage Range Input Resistance Input Offset Voltage Input Bias Current VOCM CMRR Gain POWER SUPPLY Operating Range Quiescent Current Power Supply Rejection Ratio OPERATING TEMPERATURE RANGE Conditions VOCM = 600 mV VOCM = 1.5 V to 3.5 V Min Typ 200 450 1.0 to 3.7 30 5 10 0.5 -60 1 Max Unit MHz V/s V k mV mV A dB V/V V mA A/C dB C VOS, cm = VOUT, cm; VDIN+ = VDIN- = VOCM = 2.5 V VOCM = float VOUT, dm/VOCM; VOCM = 2.5 V 0.5 V VOUT, cm/VOCM; VOCM = 2.5 V 1 V 12 0.985 2.7 9.25 1.015 11 11.25 -56 +125 VDIN+ = VDIN- = VOCM = 2.5 V TMIN to TMAX variation VOUT, dm/VS; VS = 0.5 V 10.25 20 -70 -40 Rev. B | Page 6 of 20 AD8131 ABSOLUTE MAXIMUM RATINGS Table 5.1 Parameter Supply Voltage VOCM Internal Power Dissipation Operating Temperature Range Storage Temperature Range Lead Temperature (Soldering 10 sec) 1 Rating 5.5 V VS 250 mW -40C to +125C -65C to +150C 300C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only, functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2.0 TJ = 150C MAXIMUM POWER DISSIPATION (W) Thermal resistance measured on SEMI standard 4-layer board. 8-lead SOIC: JA = 121C/W. 8-lead MSOP: JA = 142C/W. 1.5 8-LEAD SOIC PACKAGE 1.0 8-LEAD MSOP PACKAGE 0.5 01072-044 0 -50 -20 40 70 10 AMBIENT TEMPERATURE (C) 100 130 Figure 3. Plot of Maximum Power Dissipation vs. Temperature ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Rev. B | Page 7 of 20 AD8131 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS -DIN 1 VOCM 2 V+ 3 +OUT 4 1.5k 1.5k 750 750 8 +DIN 7 NC 6 V- 5 -OUT 01072-003 AD8131 NC = NO CONNECT Figure 4. Pin Configuration Table 6. Pin Function Descriptions Pin No. 1 2 3 4 5 6 7 8 Mnemonic -DIN VOCM V+ +OUT -OUT V- NC +DIN Description Negative Input. Common-Mode Output Voltage. Voltage applied to this pin sets the common-mode output voltage with a ratio of 1:1. For example, 1 V dc on VOCM will set the dc bias level on +OUT and -OUT to 1 V. Positive Supply Voltage. Positive Output. Note: the voltage at -DIN is inverted at +OUT. Negative Output. Note: the voltage at +DIN is inverted at -OUT. Negative Supply Voltage. No Connect. Positive Input. Rev. B | Page 8 of 20 AD8131 TYPICAL PERFORMANCE CHARACTERISTICS 12 VOUT = 2V p-p VS = 5V 9 1500 GAIN (dB) MSOP 6 750 49.9 750 AD8131 RL, dm = 200 3 SOIC 24.9 1500 01072-004 0 01072-007 -3 1 10 100 FREQUENCY (MHz) 1000 Figure 5. Basic Test Circuit 12 VOUT = 200mV p-p VS = 5V 9 Figure 8. Large Signal Frequency Response 12 VOUT = 2V p-p 9 VS = 5V GAIN (dB) MSOP GAIN (dB) 6 6 3 SOIC 0 01072-005 3 VS = +5V 0 01072-008 -3 -3 1 10 100 FREQUENCY (MHz) 1 10 100 FREQUENCY (MHz) 1000 1000 Figure 6. Small Signal Frequency Response 12 VOUT = 200mV p-p 9 Figure 9. Large Signal Frequency Response GAIN (dB) 6 VS = 5V 1500 2:1 TRANSFORMER 750 LPF 300 HPF ZIN = 50 3 VS = +5V 0 01072-006 49.9 750 AD8131 300 24.9 1500 01072-009 -3 1 10 100 FREQUENCY (MHz) 1000 Figure 7. Small Signal Frequency Response Figure 10. Harmonic Distortion Test Circuit (RL, dm = 800 ) Rev. B | Page 9 of 20 AD8131 -50 RL, dm = 800 VOUT, dm = 1V p-p -60 HD3 (V S = 3V) -60 HD3 (F = 20MHz) DISTORTION (dBc) -50 VS = 5V RL, dm = 800 DISTORTION (dBc) -70 HD3 (VS = 5V) -80 HD2 (V S = 3V) -90 HD2 (VS = 5V) -70 -80 HD2 (F = 20MHz) HD3 (F = 5MHz) -90 -100 01072-010 -100 HD2 (F = 5MHz) 01072-013 -110 0 10 20 30 40 FREQUENCY (MHz) 50 60 70 -110 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 DIFFERENTIAL OUTPUT VOLTAGE (V p-p) 4.0 Figure 11. Harmonic Distortion vs. Frequency -40 RL, dm = 800 VOUT, dm = 2V p-p HD3 (VS = 5V) Figure 14. Harmonic Distortion vs. Differential Output Voltage -50 VS = 3V RL, dm = 800 -60 HD3 (F = 20MHz) HD3 (F = 5MHz) -50 -60 DISTORTION (dBc) HD3 (VS = +5V) DISTORTION (dBc) -70 -70 -80 HD2 (VS = +5V) HD2 (VS = 5V) -80 HD2 (F = 20MHz) -90 -90 -100 -100 01072-011 -110 0 10 20 30 40 FREQUENCY (MHz) 50 60 70 -110 0.25 0.50 0.75 1.0 1.25 1.5 DIFFERENTIAL OUTPUT VOLTAGE (V p-p) 1.75 Figure 12. Harmonic Distortion vs. Frequency Figure 15. Harmonic Distortion vs. Differential Output Voltage -50 -55 VS = 5V RL, dm = 800 -65 HD3 (F = 20MHz) VS = 5V VOUT, dm = 2V p-p -60 HD2 (F = 20MHz) HD3 (F = 20MHz) DISTORTION (dBc) DISTORTION (dBc) -75 HD2 (F = 20MHz) -85 -70 -80 -95 -90 HD2 (F = 5MHz) 01072-012 HD2 (F = 5MHz) -115 HD3 (F = 5MHz) HD3 (F = 5MHz) -110 200 300 400 500 600 700 RLOAD () 800 900 0 1 2 3 4 5 DIFFERENTIAL OUTPUT VOLTAGE (V p-p) 6 1000 Figure 13. Harmonic Distortion vs. Differential Output Voltage Figure 16. Harmonic Distortion vs. RLOAD Rev. B | Page 10 of 20 01072-015 -105 -100 01072-014 HD2 (F = 5MHz) AD8131 -50 VS = 5V VOUT, dm = 2V p-p -60 HD2 (F = 20MHz) HD3 (F = 20MHz) DISTORTION (dBc) 45 RL, dm = 800 40 INTERCEPT (dBm) -70 35 VS = 5V 30 -80 -90 HD2 (F = 5MHz) 25 VS = +5V -100 01072-016 -110 200 300 400 500 700 600 RLOAD () 800 900 1000 15 0 10 20 30 40 50 FREQUENCY (MHz) 60 70 80 Figure 17. Harmonic Distortion vs. RLOAD -50 VS = 3V VOUT, dm = 1V p-p -60 HD2 (F = 20MHz) HD3 (F = 20MHz) Figure 20. Third Order Intercept vs. Frequency VS = 5V DISTORTION (dBc) -70 VOUT, dm VOUT+ -80 VOUT- -90 HD2 (F = 5MHz) -100 HD3 (F = 5MHz) 01072-017 V+DIN 01072-020 -110 200 300 400 500 600 700 RLOAD () 800 900 1000 1V 5ns Figure 18. Harmonic Distortion vs. RLOAD 10 0 -10 -20 -30 POUT (dBm) Figure 21. Large Signal Transient Response VS = 5V RL, dm = 800 fC = 500MHz VS = +5V -40 -50 -60 -70 -80 -90 -100 -110 49.5 50.0 FREQUENCY (MHz) 01072-018 VS = 5V 50.5 40mV 5ns Figure 19. Intermodulation Distortion Figure 22. Small Signal Transient Response Rev. B | Page 11 of 20 01072-021 01072-019 HD3 (F = 5MHz) 20 AD8131 VS = +5V VOUT = 2V p-p 1500 VS = 5V 750 24.9 49.9 750 AD8131 24.9 CL 150 1500 01072-022 400mV 5ns Figure 23. Large Signal Transient Response Figure 26. Capacitor Load Drive Test Circuit VS = 5V VOUT = 1.5V p-p VS = 3V CL = 0pF CL = 5pF CL = 20pF 01072-023 300mV 5ns 400mV 1.25ns Figure 24. Large Signal Transient Response Figure 27. Large Signal Transient Response for Various Capacitor Loads 0 VS = 5V VOUT, dm -10 -20 VS 2mV/DIV PSRR (dB) -30 -40 -50 -60 01072-027 VOUT, dm +PSRR (VS = 5V, +5V) 1V/DIV V+DIN 4ns -70 01072-024 -PSRR (VS = 5V) -80 1 100 10 FREQUENCY (MHz) Figure 25. 0.1% Settling Time Figure 28. PSRR vs. Frequency Rev. B | Page 12 of 20 01072-026 1000 01072-025 24.9 AD8131 1500 750 100 750 VOUT, cm 1500 100 750 24.9 AD8131 VOUT, dm 100 49.9 750 AD8131 100 01072-028 1500 1500 Figure 29. CMRR Test Circuit -20 VS = 5V VIN, cm = 1V p-p -20 Figure 32. Output Balance Error Test Circuit -30 -30 BALANCE ERROR (dB) VOUT, dm = 2V p-p VOUT, cm/VOUT, dm -40 CMRR (dB) -40 -50 VOUT, dm/VIN, cm -50 VS = +5V -60 -60 -70 01072-029 -80 1 10 100 FREQUENCY (MHz) 1000 -80 1 10 100 FREQUENCY (MHz) 1000 Figure 30. CMRR vs. Frequency 100 SINGLE-ENDED OUTPUT Figure 33. Output Balance Error vs. Frequency 15 VS = 5V 13 SUPPLY CURRENT (mA) IMPEDANCE () 10 11 VS = +5V 9 1 VS = +5V VS = 5V 01072-030 7 01072-034 0.1 1 10 FREQUENCY (MHz) 100 5 -50 -20 10 40 70 TEMPERATURE (C) 100 130 Figure 31. Single-Ended ZOUT vs. Frequency Figure 34. Quiescent Current vs. Temperature Rev. B | Page 13 of 20 01072-032 VOUT, cm/VIN, cm -70 VS = 5V 01072-031 24.9 AD8131 110 VS = 5V -20 VOUT, cm -30 VOCM VOCM = 600mV p-p VS = 5V 90 -40 NOISE (nV/Hz) CMRR (dB) 70 -50 -60 VOCM = 2V p-p 50 -70 30 01072-035 10 0.1k 1k 10k 100k 1M FREQUENCY (Hz) 10M 100M -90 1 10 100 FREQUENCY (MHz) 1000 Figure 35. Voltage Noise vs. Frequency 6 VOUT, cm VOCM 3 VOCM = 600mV p-p VS = 5V Figure 37. VOCM CMRR vs. Frequency VS = 5V VOCM = -1V TO +1V VOUT, cm GAIN (dB) 0 -3 VOCM = 2V p-p -6 01072-036 01072-038 -9 400mV 5ns 1 10 100 FREQUENCY (MHz) 1000 Figure 36. VOCM Gain Response Figure 38. VOCM Transient Response Rev. B | Page 14 of 20 01072-037 -80 AD8131 OPERATIONAL DESCRIPTION RF RG Common-mode voltage refers to the average of two node voltages. The output common-mode voltage is defined as -OUT -OUT RL, dm VOUT, dm +OUT 01072-039 +DIN VOCM -DIN +IN AD8131 RG -IN RF +OUT VOUT ,cm = (V+OUT + V-OUT ) 2 Balance is a measure of how well differential signals are matched in amplitude and exactly 180 degrees apart in phase. Balance is most easily determined by placing a well-matched resistor divider between the differential voltage nodes and comparing the magnitude of the signal at the divider's midpoint with the magnitude of the differential signal. By this definition, output balance is the magnitude of the output common-mode voltage divided by the magnitude of the output differentialmode voltage. Figure 39. Circuit Definitions Differential voltage refers to the difference between two node voltages. For example, the output differential voltage (or equivalently output differential-mode voltage) shown in Figure 39 is defined as VOUT ,dm = (V+OUT - V-OUT ) V+OUT and V-OUT refer to the voltages at the +OUT and -OUT terminals with respect to a common reference. Output Balance Error = VOUT , cm VOUT , dm Rev. B | Page 15 of 20 AD8131 THEORY OF OPERATION The AD8131 differs from conventional op amps in that it has two outputs whose voltages move in opposite directions. Like an op amp, it relies on high open-loop gain and negative feedback to force these outputs to the desired voltages. The AD8131 behaves much like a standard voltage feedback op amp and makes it easy to perform single-ended-to-differential conversion, common-mode level-shifting, and amplification of differential signals. Previous discrete and integrated differential driver designs used two independent amplifiers and two independent feedback loops, one to control each of the outputs. When these circuits are driven from a single-ended source, the resulting outputs are typically not well balanced. Achieving a balanced output typically required exceptional matching of the amplifiers and feedback networks. DC common-mode level shifting has also been difficult with previous differential drivers. Level shifting required the use of a third amplifier and feedback loop to control the output common-mode level. Sometimes the third amplifier has also been used to attempt to correct an inherently unbalanced circuit. Excellent performance over a wide frequency range has proven difficult with this approach. The AD8131 uses two feedback loops to separately control the differential and common-mode output voltages. The differential feedback, set by internal resistors, controls only the differential output voltage. The common-mode feedback controls only the common-mode output voltage. This architecture makes it easy to arbitrarily set the common-mode output level. It is forced, by internal common-mode feedback, to be equal to the voltage applied to the VOCM input, without affecting the differential output voltage. The AD8131 architecture results in outputs that are very highly balanced over a wide frequency range without requiring external components or adjustments. The common-mode feedback loop forces the signal component of the output common-mode voltage to be zeroed. The result is nearly perfectly balanced differential outputs, of identical amplitude and exactly 180 degrees apart in phase. be assumed to be zero. Starting from these two assumptions, any application circuit can be analyzed. CLOSED-LOOP GAIN The differential mode gain of the circuit in Figure 39 can be described by the following equation: VOUT, dm V IN, dm = RF =2 RG where RF = 1.5 k and RG = 750 nominally. ESTIMATING THE OUTPUT NOISE VOLTAGE Similar to the case of a conventional op amp, the differential output errors (noise and offset voltages) can be estimated by multiplying the input referred terms, at +IN and -IN, by the circuit noise gain. The noise gain is defined as R GN = 1 + F R G =3 The total output referred noise for the AD8131, including the contributions of RF, RG, and op amp, is nominally 25 nV/Hz at 20 MHz. CALCULATING THE INPUT IMPEDANCE OF AN APPLICATION CIRCUIT The effective input impedance of a circuit such as that in Figure 39, at +DIN and -DIN, will depend on whether the amplifier is being driven by a single-ended or differential signal source. For balanced differential input signals, the input impedance (RIN, dm) between the inputs (+DIN and -DIN) is R IN , dm = 2 x RG = 1.5 k In the case of a single-ended input signal (for example if -DIN is grounded and the input signal is applied to +DIN), the input impedance becomes RG = = 1.125 k RF 1- 2 x (RG + R F ) R IN , dm ANALYZING AN APPLICATION CIRCUIT The AD8131 uses high open-loop gain and negative feedback to force its differential and common-mode output voltages in such a way as to minimize the differential and common-mode error voltages. The differential error voltage is defined as the voltage between the differential inputs labeled +IN and -IN in Figure 39. For most purposes, this voltage can be assumed to be zero. Similarly, the difference between the actual output common-mode voltage and the voltage applied to VOCM can also The input impedance is effectively higher than it would be for a conventional op amp connected as an inverter because a fraction of the differential output voltage appears at the inputs as a common-mode signal, partially bootstrapping the voltage across the input resistor RG. Rev. B | Page 16 of 20 AD8131 INPUT COMMON-MODE VOLTAGE RANGE IN SINGLE-SUPPLY APPLICATIONS The AD8131 is optimized for level-shifting ground referenced input signals. For a single-ended input this would imply, for example, that the voltage at -DIN in Figure 39 would be zero volts when the amplifier's negative power supply voltage (at V-) was also set to zero volts. In cases where more accurate control of the output commonmode level is required, it is recommended that an external source, or resistor divider (made up of 10 k resistors), be used. DRIVING A CAPACITIVE LOAD A purely capacitive load can react with the pin and bondwire inductance of the AD8131 resulting in high frequency ringing in the pulse response. One way to minimize this effect is to place a small resistor in series with the amplifier's outputs as shown in Figure 26. SETTING THE OUTPUT COMMON-MODE VOLTAGE The AD8131's VOCM pin is internally biased at a voltage approximately equal to the midsupply point (average value of the voltages on V+ and V-). Relying on this internal bias results in an output common-mode voltage that is within about 25 mV of the expected value. Rev. B | Page 17 of 20 AD8131 APPLICATIONS TWISTED-PAIR LINE DRIVER The AD8131 has on-chip resistors that provide for a gain of 2 without any external parts. Several on-chip resistors are trimmed to ensure that the gain is accurate, the common-mode rejection is good, and the output is well balanced. This makes the AD8131 very suitable as a single-ended-to-differential twisted-pair line driver. Figure 40 shows a circuit of an AD8131 driving a twisted-pair line, like a Category 3 or Category 5 (Cat3 or Cat5), that is already installed in many buildings for telephony and data communications. The characteristic impedance of such a transmission line is usually about 100 . The outstanding balance of the AD8131 output will minimize the commonmode signal and therefore the amount of EMI generated by driving the twisted pair. The two resistors in series with each output terminate the line at the transmit end. Since the impedances of the outputs of the AD8131 are very low, they can be thought of as a short-circuit, and the two terminating resistors form a 100 termination at the transmit end of the transmission line. The receive end is directly terminated by a 100 resistor across the line. This back-termination of the transmission line divides the output signal by two. The fixed gain of 2 of the AD8131 will create a net unity gain for the system from end to end. In this case, the input signal is provided by a signal generator with an output impedance of 50 . This is terminated with a 49.9 resistor near +DIN of the AD8131. The effective parallel resistance of the source and termination is 25 .The 24.9 resistor from -DIN to ground matches the +DIN source impedance and minimizes any dc and gain errors. If +DIN is driven by a low-impedance source over a short distance, such as the output of an op amp, then no termination resistor is required at +DIN. In this case, the -DIN can be directly tied to ground. +5V 0.1F 49.9 8 3 5 + 10F 3 V SUPPLY DIFFERENTIAL A-TO-D DRIVER Many newer ADCs can run from a single 3 V supply, which can save significant system power. In order to increase the dynamic range at the analog input, they have differential inputs, which double the dynamic range with respect to a single-ended input. An added benefit of using a differential input is that the distortion can be improved. The low distortion and ability to run from a single 3 V supply make the AD8131 suited as an A-to-D driver for some 10-bit, singlesupply applications. Figure 41 shows a schematic for a circuit for an AD8131 driving an AD9203, a 10-bit, 40 MSPS ADC. The common mode of the AD8131 output is set at midsupply by the voltage divider connected to VOCM, and ac-bypassed with a 0.1 F capacitor. This provides for maximum dynamic range between the supplies at the output of the AD8131. The 110 resistors at the AD8131 output, along with the shunt capacitors form a one pole, low-pass filter for lowering noise and antialiasing. 3V 0.1 F 3 LPF 49.9 8 2 0.1 F 1 +3V 10k 24.9 6 110 110 20pF + 10 F 28 26 AVDD AINN 2 DRVDD 3V 0.1 F AD8131 VOCM 25 20pF AD9203 DIGITAL OUTPUTS AINP AVSS 27 DRVSS 1 Figure 41. Test Circuit for AD8131 Driving an AD9203, 10-Bit, 40 MSPS ADC Figure 42 shows an FFT plot that was taken from the combined devices at an analog input frequency of 2.5 MHz and a 40 MSPS sampling rate. The performance of the AD8131 compares very favorably with a center-tapped transformer drive, which has typically been the best way to drive this ADC. The AD8131 has the advantage of maintaining dc performance, which a transformer solution cannot provide. 49.9 2 1 AD8131 6 4 100 RECEIVER 24.9 49.9 0.1F -5V 01072-040 10F + Figure 40. Single-Ended-to-Differential 100 Line Driver Rev. B | Page 18 of 20 01072-041 10k AD8131 10 0 -10 -20 -30 POUT (dBm) +5V 0.1 F + 10 F INPUT -40 -50 -60 -70 -80 -90 01072-042 8 3 5 -OUT 49.9 2 1 AD8131 6 4 +OUT 0.1 F 10 F + 01072-043 -100 -110 -120 2.0 2.1 2.2 2.3 2.4 2.5 2.6 2.7 FREQUENCY (MHz) 2.8 2.9 3.0 -5V Figure 43. Unity Gain, Single-Ended-to-Differential Amplifier Figure 42. FFT Plot for AD8131/AD9203 UNITY-GAIN, SINGLE-ENDED-TO-DIFFERENTIAL DRIVER If it is not necessary to offset the output common-mode voltage (via the VOCM pin), then the AD8131 can make a simple unitygain single-ended-to-differential amplifier that does not require any external components. Figure 43 shows the schematic for this circuit. As shown above, when -DIN is left floating, there is 100% feedback of +OUT to -IN via the internal feedback resistor. This contrasts with the typical gain of 2 operation where -DIN is grounded and one third of the +OUT is fed back to -IN. The result is a closed-loop differential gain of 1. Upon careful observation, it can be seen that only +DIN and VOCM are referenced to ground. The ground voltage at VOCM is the reference for this circuit. In this unity gain configuration, if a dc voltage is applied to VOCM to shift the common-mode voltage, a differential dc voltage will be created at the output, along with the common-mode voltage change. Thus, this configuration cannot be used when it is desired to offset the common-mode voltage of the output with respect to the input at +DIN. Rev. B | Page 19 of 20 AD8131 OUTLINE DIMENSIONS 5.00 (0.1968) 4.80 (0.1890) 8 5 4 3.00 BSC 4.00 (0.1574) 3.80 (0.1497) 1 6.20 (0.2440) 5.80 (0.2284) 8 5 3.00 BSC 1 4.90 BSC 4 1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0040) 1.75 (0.0688) 1.35 (0.0532) 0.50 (0.0196) x 45 0.25 (0.0099) PIN 1 0.65 BSC 1.10 MAX 8 0 0.80 0.60 0.40 0.51 (0.0201) COPLANARITY SEATING 0.31 (0.0122) 0.10 PLANE 8 0.25 (0.0098) 0 1.27 (0.0500) 0.40 (0.0157) 0.17 (0.0067) 0.15 0.00 0.38 0.22 COPLANARITY 0.10 COMPLIANT TO JEDEC STANDARDS MS-012-AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN 0.23 0.08 SEATING PLANE COMPLIANT TO JEDEC STANDARDS MO-187-AA Figure 44. 8-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-8) Dimensions shown in millimeters and (inches) Figure 45. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters ORDERING GUIDE Model AD8131AR AD8131AR-REEL AD8131AR-REEL7 AD8131ARZ 1 AD8131ARZ-REEL1 AD8131ARZ-REEL71 AD8131ARM AD8131ARM-REEL AD8131ARM-REEL7 AD8131ARMZ1 AD8131ARMZ-REEL1 AD8131ARMZ-REEL71 1 Temperature Range -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C Package Description 8-Lead Standard Small Outline Package [SOIC_N] 8-Lead SOIC, 13" Tape and Reel 8-Lead SOIC, 7" Tape and Reel 8-Lead Standard Small Outline Package [SOIC_N] 8-Lead SOIC, 13" Tape and Reel 8-Lead SOIC, 7" Tape and Reel 8-Lead Mini Small Outline Package [MSOP] 8-Lead MSOP, 13" Tape and Reel 8-Lead MSOP, 7" Tape and Reel 8-Lead Mini Small Outline Package [MSOP] 8-Lead MSOP, 13" Tape and Reel 8-Lead MSOP, 7" Tape and Reel Package Option R-8 R-8 R-8 R-8 R-8 R-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 Branding HJA HJA HJA HJA# HJA# HJA# Z = Pb-free part, # denotes Pb-free part; may be top or bottom marked. (c)2005 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C01072-0-6/05(B) Rev. B | Page 20 of 20 |
Price & Availability of AD813105
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |